High-frequency circuits are commonly used in modern applications such as wireless communication applications. A common problem faced by designers is signal loss in the substrates that are underlying the high-frequency circuits, which signal loss is partially caused by the parasitic capacitors formed between the high-frequency circuits and the underlying substrates. Typically, with the increase in the frequency of the signals, loss also increases. This significantly limits the design of high-frequency circuits.
FIG. 1 illustrates conventional radio frequency (RF) transmission line 10 formed over semiconductor substrate 2. RF transmission line 10 includes signal lines 6 for transmitting signals. Shielding metal pattern 4 is formed between semiconductor substrate 2 and RF transmission line 10. Shielding metal pattern 4 may be grounded. Dielectric layer(s) 8 separates RF transmission line 10 from semiconductor substrate 2. Although shielding metal pattern 4 is used to shield the signals transmitted in signal lines 6 from being coupled to semiconductor substrate 2, due to the fact that the thickness and the area of shielding metal pattern 4 is limited, parasitic capacitors 12 are still formed between signal lines 6 and semiconductor substrate 2. The undesirable parasitic capacitors 12 limit the operation frequency of RF transmission line 10 to about 10 GHz and below. When the frequency is further increased, the signal loss in semiconductor substrate 2 significantly increases.
Further, the signal loss problem may be worsened by the increasing down-scaling of integrated circuits, which causes a reduction in distances between the high-frequency transmission lines and the respective underlying substrates. The reduced distances result in an increase in parasitic capacitances. Solutions are thus needed to solve the above-discussed problems.